Analog Circuit Design(PLL) Engineer At Samsung Electronics In Bengaluru

Location: Bengaluru

Company: Samsung Electronics

Need Senior Analog designers with relevant experience of 5-12 years in Analog and Mixed Signal Design. At least Full IP design experience in one of the domains as listed below.

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• Low Jitter and High Frequency PLL Design Experience. Both LC and Ring based PLL design Experience.
• General Purpose ADC and thermal Sensors IP design Experience.
• High-speed Serdes Design Experience.
• LDO, BGR and other Power management blocks.

Ideal Candidate should be ready for a challenging design experience and exposure to silicon validation. He will get full exposure to the IP design cycle in the advanced Samsung foundry process 4nm and below.

Please share your CV to [email protected]