How 3D NAND Shapes The Future Of AI Memory

With AI’s data boom, powerful memory is becoming all the more necessary for next-gen computing. It is 3D NAND that can support this necessity with cryogenic tech. What is its future, and who is leading the market? 

NAND flash technology has been the primary solution for low-cost and large-density data storage applications for several decades, enabling the revolution of markets from USB drives to mobile phones to servers. The non-volatile two-dimensional (2D) NAND flash memory has been the workhorse of the storage industry, delivering increased performance, reliability and lower power consumption at lower cost.

However, the advent of smartphones has triggered an exponential need for storage in devices as well as cloud servers to store data from millions of applications across billions of devices. Over the years, user-generated content has grown from high-definition (HD) images to four-kilobyte (4K) videos, demanding more advanced and high-capacity storage solutions. High-quality streaming content, including music and videos, requires significant storage capacity.

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This demand can be met by the industry’s move to a three-dimensional (3D) structure, where horizontal layers of memory cells are stacked and connected using tiny vertical channels to increase storage density. This approach allows the industry to keep pace with Moore’s Law despite the challenges of making memory cells smaller. With each subsequent generation from single-layer cell (SLC) to quad-level cell (QLC) flash, the number of bits per cell kept doubling.

Three-dimensional NAND (3D NAND) flash memory has become the dominant non-volatile memory since the shipment of Samsung’s second-generation 32-bit layer in 2014. Depending on the NAND vendors (Samsung, Western Digital, Toshiba, Micron, SK Hynix and others), variations in the 3D NAND structure exist and are known by different names, such as vertical-NAND flash (V-NAND flash) and bit in cost scalable (BICS).

Over the last decade, the bit density has increased from one gigabit per square millimetre (1 GB/mm²) to an impressive 14.6 gigabits per square millimetre (14.6 GB/mm²). The continued advancement in computing for training and generative AI models in cloud and edge computing, along with high-quality user-generated content via smartphone cameras, will drive a significant need for faster, tougher capacity storage for at least the next two decades. AI smartphones, AI personal computers (AI PCs), AI servers, autonomous vehicles and robotics will be key drivers for 3D NAND growth. 

Consequently, the overall NAND flash memory market is expected to more than double to reach $83 billion by 2036, up from $40 billion in 2023.

Breaking barriers in 3D NAND scaling

Without major innovations in tools such as deposition and etch, the evolution will struggle to improve the cost efficiency of NAND flash storage products. Increasing the processing steps and time to enable the scaling roadmap will drive greater investment in highly advanced deposition and etch tools, which could slightly slow down the storage roadmap.

To meet growing data demands driven by AI, memory vendors are finding smarter ways to pack more bits into tighter spaces without sacrificing cost or performance. The industry is actively exploring innovations in equipment and manufacturing techniques to address these challenges. Some leading equipment manufacturers for 3D NAND manufacturing, such as Lam Research, are working closely with memory vendors to co-optimise advanced deposition and etch technologies. For example, Lam’s proprietary cryogenic technology enhances etch chemistry and polymer management solutions, helping to mitigate 3D NAND scaling challenges.

Cryogenic technology: etching and process

Initially developed in the 1980s, cryogenic etching is re-emerging as a dry etching method. The etch process is carried out at a low on-wafer temperature, typically below 0°C, with temperature control allowing for operation at even lower temperatures. Cryogenic etching helps to increase the adsorption of reactive substances while limiting the lateral etch rate. Leveraging low-temperature benefits and different plasma chemistry delivers increased high aspect ratio etch capability, enhancing the etching rate. Adopting novel chemistries during the low-temperature process improves the circularity and sidewall roughness of the etched holes. This technology also reduces the overall environmental impact of the etching process. Cryogenic technology addresses the challenges of the traditional high-aspect ratio (HAR) process.

Challenges in scaling 3D NAND

NAND vertical stack scaling gives rise to challenges primarily in film deposition and etch, unlike device scaling via feature size reduction. To pattern, isolate and connect vertically integrated 3D memory devices, difficult high-aspect-ratio (HAR) etches are required. The aspect ratio for a hole or trench is generally defined as the ratio of the depth to the width of the hole or trench. Critical processes in 3D NAND manufacturing include ultimate stack film deposition, tough aspect ratio etching and word line metallisation. Finding the balance between bit density, read and write speeds, power, reliability, and cost is crucial for applications. The process becomes more complex as additional layers are added to the structure, leading to increased capital expenditures. As the number of layers rises, it becomes increasingly costly to add more storage capacity.

However, the process complexity and capital intensity of 3D NAND manufacturing contributes to the difficulties fabs face in terms of process control, yield and cost per bit.

NAND is a complex technology that presents significant manufacturing challenges, such as HAR etch processes to enable tiny vertical channels, obtaining sufficient drive current between the memory cells, logic design optimisation and wafer warpage.

The 3D NAND for future

Lam Research has developed this technology over the years and is a market leader in 3D NAND dielectric etching. With the introduction of cryogenic etching technology in 2019, Lam’s installed base has grown to more than 7500 chambers, with nearly 1000 of these in production with cryogenic etch technology. This strong installed base gives Lam the experience of etching more than five million wafers using cryogenic etch technology.

The latest innovation, Lam Cryo™ 3.0, leverages the benefits of utilising scalable, high power and ion energy confined plasma reactors, unique pulsed plasma technology, and temperatures as low as -60°C to etch with tight profile control efficiently. It enables deeper etching without compromising the feature shape. The repeatability of a highly precise, predictable etching process helps NAND providers achieve consistent output during production.