Reference Design For Transmitting SPI Signals Via LVDS

By leveraging the LVDS interface for SPI communication, this solution provides a reliable, power-efficient, and noise-resistant method for extending SPI communication range across various industrial and medical applications.

Serial Peripheral Interface (SPI) is widely used for communication between processors and peripheral devices in various applications. Initially designed for short-distance communication within a single printed circuit board (PCB), the demand for longer-range SPI communication—either within the same PCB or between different boards—has been increasing. However, as the communication distance grows, issues such as external noise, crosstalk, and signal degradation due to propagation delays become significant concerns. Additionally, potential ground shifts between boards can further impact signal quality.

This design guide presents a solution to extend SPI communication range efficiently while maintaining signal integrity. It addresses challenges related to transmitting SPI signals over longer distances, both on a single PCB and off-PCB to another board in noisy environments. The proposed approach involves transmitting SPI signals through a Low Voltage Differential Signaling (LVDS) interface, which offers superior noise immunity, reduced electromagnetic interference (EMI) emissions, and a wider common-mode input tolerance.

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The reference design TIDA-060017 by Texas Isntruments (TI) employs an LVDS driver and receiver to convert single-ended SPI signals for long-distance transmission. Specifically, the SN65LVDS31 and SN65LVDS33 evaluation modules (EVMs) are used, featuring a quad-channel LVDS driver (SN65LVDS31) and receiver (SN65LVDS33). Additionally, the ADS8910B EVM is included in this setup, which integrates both the SPI master device (PHI controller) and the SPI slave device (ADS8910B). The ADS8910B is a high-speed, high-precision, 18-bit successive approximation register (SAR) analog-to-digital converter (ADC) equipped with an integrated reference buffer and low-dropout (LDO) regulator.

This TI reference design provides several key benefits. It significantly enhances signal quality by transmitting SPI signals via an LVDS interface. Additionally, it includes a detailed timing analysis, examining how distance and the LVDS interface affect SPI communication speed. The design also presents solutions for overcoming SPI timing challenges, such as routing the serial clock (SCLK) back to the SPI master or leveraging the Enhanced SPI feature available in select TI devices. Furthermore, the design allows for evaluating different SPI peripherals, as well as LVDS drivers and receivers, to optimize performance based on specific requirements.

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The implementation of SPI over LVDS extends the communication range to at least three meters, compared to the standard SPI range of only 0.5 meters. This approach also reduces propagation delays and enhances SPI communication speed by efficiently routing the SCLK signal. Additionally, it offers 10 times lower power consumption compared to other differential signaling solutions like RS-422 and RS-485. The wide common-mode input voltage range of -4V to 5V ensures high immunity to ground bounce, making it suitable for applications that require robust and reliable data transmission. This reference design is ideal for applications such as semiconductor test equipment, data acquisition systems, laboratory instrumentation, ultrasound and CT scanners, protection relays, and terminal units.

TI has tested this reference design. It comes with a bill of materials (BOM), schematics, assembly drawing, printed circuit board (PCB) layout, and more. The company’s website has additional data about the reference design. To read more about this reference design, click here.